ICVS increases designer efficiency in evaluating design marginality, analyzing signal integrity and characterizing performance and yield
SAN JOSE, Calif. - NPTest, an indirect wholly owned subsidiary of Schlumberger Limited, announced that SABER will feature its IC Validation Service (ICVS) in Booth #2354 at the Design Automation Conference (DAC) June 2-4 in Anaheim, California. ICVS is used to validate design functionality and guarantees locating failures at first silicon. SABER, the product engineering services arm of NPTest, combines validation expertise with advanced diagnostic technologies to analyze device electrical performance with in-silicon measurements and to locate device failures and modify silicon circuitry.
The ICVS is the industry's only service to complement simulation with the silicon measurements that assist designers in efficiently validating first silicon.
With the IC Validation Service (ICVS), data is taken directly from the nets and the transistors of the IC to help designers trace the root cause of performance deviations. These anomalies may be the result of issues such as cross-talk noise, IR drops, clock tree skew and race conditions. In addition, waveform measurements are valuable in speed path analysis for yield improvement and assist designers in evaluating design marginality arising from design and process interaction. Silicon characterization with in-circuit measurements identifies yield limitations and the effects of the manufacturing process on design functionality and performance. When needed, ICVS has the resources to modify design functionality and behavior before designers commit to a new tape-out and mask set. NPTest SABER guarantees results, providing in days what can take weeks to analyze with simulation alone.
"As device complexity increases, so does the value of a solid silicon validation strategy to save simulation time and re-spin costs," stated Vernon Rogers, director of SABER Marketing and Sales, NPTest. "Real-world data complements the designer's 'virtual world' of simulation models. Today designers are including ICVS in their product development cycle to accelerate product development across the whole range of manufacturing technologies, including leading-edge 90-nm processes and flip-chip packaging."
At DAC, NPTest will also present a Hands-On Tutorial entitled, "Signal and Power Integrity Validation with In-Circuit Measurements" on Thursday afternoon, June 5. Attendees will learn about tools and technologies that address signal and power integrity problems at first silicon. The Tutorial will include an overview of probing technologies and design analysis case studies illustrating high speed I/O signal integrity, PLL jitter and clock tree skew, speed path analysis for yield improvement, and marginality issues, such as design and process interaction. For more information and to register visit http://www.dac.com/40th/reg.html.
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About NPTest
NPTest, a global supplier of validation, characterization and test systems and services to the semiconductor industry, enables companies to bring their IC products to market faster at lower cost. Used by leading integrated device manufacturers, foundries, fabless companies and subcontractors, NPTest products and SABER product engineering services focus on the development and production of advanced devices used in computers, high-speed data communications and complex consumer electronics. Headquartered in San Jose, California, NPTest is an indirect wholly owned subsidiary of Schlumberger Limited. Additional information is available at nptest.com.
For further information, contact:
Patrice Riley
NPTest
Tel: 408 586 6738
priley@nptest.com
© Press Release 2006
